PCIE 5.0 Mac Layer Functional Verification Coding

FREE

Instructor: ShivaLanguage: english

About the course

Introduction

The DUT consists of two devices: an Upstream device and a Downstream device, connected together through a PCIe link. The testbench is designed with two separate environments, one for the upstream device and one for the downstream device. Since both environments are almost identical in structure and functionality, it is sufficient to explain only one of them in detail.

Interfaces

Interfaces are mainly used to simplify DUT and Testbench connections, bundle related signals, and improve reusability. There are two interfaces in the testbench:

LPIF Interface


Located between the Physical Layer and the Data Link Layer.
Three agents use this interface:

  • LTSSM2 Agent

  • TX Master Agent
  • RX Passive Agent


PIPE Interface


Located between the Logical part and the Electrical part of the Physical Layer.
Three agents use this interface:

  • LTSSM1 Agent

  • TX Slave Agent
  • RX Slave Agent

Sequence Items

There are four types of sequence items used in the testbench:

Sequence Item

Description

LPIF sequence item

Used in TX Master and RX Passive agents to send/receive stimulus via LPIF. Also used for communication between LPIF-related components such as scoreboard and coverage model.

PIPE sequence item

Used in TX Slave and RX Slave agents to send/receive stimulus via PIPE. Also used for communication between PIPE-related components such as scoreboard and coverage model.

LTSSM1 sequence item

Simplified version of PIPE sequence item used to drive LTSSM through PIPE interface.

LTSSM2 sequence item

Simplified version of LPIF sequence item used to drive LTSSM through LPIF interface.

These sequence items are generated by sequences to send stimulus to the DUT or to enable communication between testbench components.

Sequences

Sequences allow testbench developers to create random, constrained-random, or directed stimulus patterns to verify different DUT scenarios. They run on a sequencer that coordinates with the driver to pass sequence items to the DUT.

Types of Sequences


Reset Sequences


  • LTSSM1 Reset Sequence (PIPE interface)

  • LTSSM2 Reset Sequence (LPIF interface)

Linkup Sequences

  • Linkup1 (PIPE)
  • Linkup2 (LPIF)

Force Detect Sequence

  • Force Detect LTSSM2 Sequence (LPIF)


Data Transmission Sequences
Used to generate and transmit:



  • TLP packets of different lengths

     
  • DLLP packets

  • Different data rates
  • Different ordering patterns



Error Injection Sequences
Used to inject errors into packets exchanged between downstream and upstream devices. This is achieved through a non-UVM component called the Adapter that connects both devices.

Note: Virtual sequences coordinate sequences of the same or different types so they operate together in synchronization.

Agents

An agent encapsulates all verification components related to an interface — driver, monitor, sequencer — into a reusable configurable unit.

There are six agents:

  • TX Master Agent
  • RX Passive Agent
  • RX Slave Agent
  • TX Slave Agent
  • LTSSM1 Agent
  • LTSSM2 Agent

TX Master Agent

This agent plays a major role in data transmission operations.

Data transmission sequences start on the TX Master sequencer, delivering stimulus to the TX Master driver, which drives it to the TX of the DUT through LPIF.

Components

  • TX Master Sequencer → Controls transaction flow
  • TX Master Driver → Converts transactions into pin activity
  • TX Master Monitor → Extracts transmitted packets and sends them to scoreboard and coverage
  • Configuration Object → Stores settings such as interface handles

RX Passive Agent

This agent is passive because it contains no driver or sequencer.

Its main role is to extract received TLP and DLLP packets from LPIF and send them to:

  • LPIF Scoreboard
  • Coverage Model

Components

  • RX Passive Monitor
  • RX Passive Configuration Object

 

TX Slave Agent

Monitors packets sent through the PIPE interface, especially ordered sets.

Components

  • TX Slave Monitor → Predicts TX LTSSM current and next state using ordered sets, timeout, and error injection
  • Configuration Object

 

RX Slave Agent

Monitors packets received through PIPE.

Components

  • RX Slave Monitor → Predicts RX LTSSM current and next state using ordered sets, timeout, and error injection
  • Configuration Object

 

LTSSM1 / LTSSM2 Agents

Used to initiate LTSSM signals to prepare link-up.

Components

  • Sequencer → Controls sequence flow
  • Driver → Converts transactions into pin activity
  • Configuration Object → Stores required settings

Scoreboards

A scoreboard verifies DUT correctness by comparing actual output with expected output.

There are two scoreboards:

PIPE Scoreboard

Checks:

  • FSM transitions
  • Number of ordered sets
  • Type of ordered sets
  • Important PHY signals

LPIF Scoreboard

Checks received data by comparing it with transmitted data from the other device:

  • Packet type
  • Packet size
  • Packet data

Coverage Models

Coverage models measure how much of the design has been tested. Their goal is to evaluate stimulus effectiveness and identify untested scenarios.

There are two coverage models:

LPIF Coverage Model
Covers:

  • Different packet types (TLP/DLLP)
  • Different packet sizes
  • Different data patterns
  • Same and different streams

PIPE Coverage Model
Covers:

  • All FSM transitions
  • TX and RX paths

Adapter

The Adapter is a non-UVM component located midway between upstream and downstream devices.

Functions

1. Packet Bypass
Allows normal PCIe operation by passing packets directly.

2. Error Injection
Deliberately inserts faults or protocol violations into:

  • Data paths
  • Control signals
  • Protocol fields

Purpose:
To test DUT robustness, error handling, and recovery mechanisms.

Syllabus

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